Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of the HAPS®-600 series, the highest capacity extension of the HAPS family of FPGA-based prototyping systems. The HAPS-600 series extends FPGA-based prototyping capacity up to 81 million ASIC gates equivalent, enabling early software development for larger SoC projects. Like the HAPS-60 products, the HAPS-600series is based on Xilinx Virtex®-6 LX760 FPGA devices and offers performance up to 200 megahertz (MHz).
The HAPS family provides an integrated and scalable hardware plus software solution that is used by hardware and software design teams to develop software, verify SoC hardware and enable hardware/software integration before tape-out. Designers can reduce initial turnaround times and subsequent iterations with the HAPS-600 series' highly automated software flow from ASIC RTL code to the FPGA-based prototype utilizing Synopsys' patented programmable switch routing technology.
"Lantiq has been a long time user of the Synopsys FPGA-based prototyping solution. We have now adopted the HAPS-600 series as it provides greater capacity, high performance, and flexibility in terms of system board routing. The comprehensive integration of hardware and software components together with the excellent Synopsys customer support made it possible to quickly map our first ASIC design onto the system. We were able to provide a working prototype to our system development team within a quite short period of time." said Alexander Haggenmiller, Director Central R&D, Lantiq. "The HAPS-600 systems allow us to start software development and system integration very early in the project phase. With these prototyping systems, we will be able to complete our upcoming complex SoC projects faster."
Like the HAPS-60 series, the HAPS-600 series includes native integration of the Universal Multi-Resource Bus(UMRBus) which allows users to ease system bring-up with co-simulation capabilities. The UMRBus also accelerates system-level verification with SCE-MI 2.0 transaction-based verification and provides links to Synopsys' virtual prototyping solution. In addition, the HAPS-600 series offers enhanced design visibility reducing debug time as well as remote prototype management improving productivity for globally distributed teams. Design teams also benefit from the HAPS-600 series' support of Synopsys' DesignWare® IP, which ensures that the same IP code used in the design is also available within the FPGA-based prototype.
"The HAPS-600 series delivers the capacity, flexibility, speed and ease-of-use developers of larger SoC designs need to achieve more thorough system verification and earlier software development," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "Lantiq's success in developing complex SoCs for the networking and digital home markets requires proven technology and the optimal combination of high-performance, high-capacity hardware with the comprehensive software tool flow that HAPS delivers."
Availability
The HAPS-600 series is available immediately. For more information, please visit: www.synopsys.com/haps600. Synopsys will demonstrate a HAPS-600 system at the DVCon 2011 conference held in San Jose, Calif. on March 1-2, 2011.
Synopsys, DesignWare, HAPS are registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
The HAPS family provides an integrated and scalable hardware plus software solution that is used by hardware and software design teams to develop software, verify SoC hardware and enable hardware/software integration before tape-out. Designers can reduce initial turnaround times and subsequent iterations with the HAPS-600 series' highly automated software flow from ASIC RTL code to the FPGA-based prototype utilizing Synopsys' patented programmable switch routing technology.
"Lantiq has been a long time user of the Synopsys FPGA-based prototyping solution. We have now adopted the HAPS-600 series as it provides greater capacity, high performance, and flexibility in terms of system board routing. The comprehensive integration of hardware and software components together with the excellent Synopsys customer support made it possible to quickly map our first ASIC design onto the system. We were able to provide a working prototype to our system development team within a quite short period of time." said Alexander Haggenmiller, Director Central R&D, Lantiq. "The HAPS-600 systems allow us to start software development and system integration very early in the project phase. With these prototyping systems, we will be able to complete our upcoming complex SoC projects faster."
Like the HAPS-60 series, the HAPS-600 series includes native integration of the Universal Multi-Resource Bus(UMRBus) which allows users to ease system bring-up with co-simulation capabilities. The UMRBus also accelerates system-level verification with SCE-MI 2.0 transaction-based verification and provides links to Synopsys' virtual prototyping solution. In addition, the HAPS-600 series offers enhanced design visibility reducing debug time as well as remote prototype management improving productivity for globally distributed teams. Design teams also benefit from the HAPS-600 series' support of Synopsys' DesignWare® IP, which ensures that the same IP code used in the design is also available within the FPGA-based prototype.
"The HAPS-600 series delivers the capacity, flexibility, speed and ease-of-use developers of larger SoC designs need to achieve more thorough system verification and earlier software development," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "Lantiq's success in developing complex SoCs for the networking and digital home markets requires proven technology and the optimal combination of high-performance, high-capacity hardware with the comprehensive software tool flow that HAPS delivers."
Availability
The HAPS-600 series is available immediately. For more information, please visit: www.synopsys.com/haps600. Synopsys will demonstrate a HAPS-600 system at the DVCon 2011 conference held in San Jose, Calif. on March 1-2, 2011.
Synopsys, DesignWare, HAPS are registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
