PresseBox
Pressemitteilung BoxID: 753895 (pls Programmierbare Logik & Systeme GmbH)
  • pls Programmierbare Logik & Systeme GmbH
  • Straße der Freundschaft 92
  • 02991 Lauta
  • http://www.pls-mc.com
  • Ansprechpartner
  • Heiko Rießland
  • +49 (35722) 384-0

UDE available at the same time as the first MCU samples

PLS' UDE 4.4.6 supports all functions of STMicroelectronics new SPC58 E-line multi-core automotive MCUs

(PresseBox) (Lauta, ) As a result of many years of close partnership with STMicroelectronics, PLS Programmierbare Logik & Systeme is already able to offer the Universal Debug Engine (UDE) 4.4.6, a sophisticated and proven debugging and testing solution, for the first samples of STMicroelectronics new SPC58 E-line in ST's multi-core automotive microcontroller (MCU) family.

The new SPC58 E-line MCUs are among the most sophisticated automotive MCUs currently available on the market. Features of these new automotive MCUs include: three Power Architecture based CPU cores (e200z4d), two of which are capable of lockstep, 6320 kB on-chip flash memory, 768 kB SRAM, Generic Timer Module (GTM), Hardware Security Module (HSM), seven Controller Area Network (CAN) nodes, one Time-Triggered Controller Area Network (TTCAN) node, various analog-to-digital converters and a wide range of additional high-performance peripheral functions. The target applications for these new SPC58 E-line MCUs include engine management, transmission control and advanced driver assistance systems (ADAS).

The UDE 4.4.6 allows users to carry out reliable and fast programming of the integrated flash memory as well as the control and management of all active units of the SoC within one consistent user interface. As a result, not only can the main cores be selected as debug target, but also the Generic Timer Module (GTM) and Hardware Security Module (HSM) or the whole device. This high degree of flexibility is supported by a flexible multi-core program loader, which enables loading of program code and data as well as symbol information separately for each individual core.

Management of the individual active units by the debugger is carried out via a special multi-core run control manager, which enables an almost synchronous starting and stopping of the various cores at any time by utilizing logic that is integrated on the chip. In addition, debugging is simplified by the multi-core breakpoints implemented in the UDE. With their help, in shared code a simultaneously acting breakpoint for all cores can be very easily set. Data breakpoints in turn allow the recognition of read and/or write accesses to a variable. Furthermore, even an expected value can also be optionally taken into account.

The SPC58 E-line SoCs are also available as emulation devices, which are pin-compatible with The production devices. These emulation devices include additional emulation memory, extensive trigger and filter logic as well as connections for a serial high-speed interface based on the Aurora protocol. In order that developers can as simply as possible and abstractly configure the several hundred registers of the additional emulation memory, PLS offers the Universal Emulation Configurator (UEC) with block graphics user interface in addition to the UDE 4.4.6. Measurement tasks can be defined particularly easily with help of the UEC. In doing so, specific states in the target are described by signals. These, in turn, can initiate actions or shift an underlying state machine into a new state.

The Universal Emulation Configurator (UEC) helps the user to cope as effectively as possible with the limited resources of the on-chip emulation memory. In parallel to this, the implemented Aurora interface offers the possibility to externally record a very large amount of trace data and to carry out a statistical analysis of the program flow such as code coverage and profiling. PLS' Universal Access Device 3+ (UAD3+) with Aurora pod serves for recording, while the evaluation itself is carried out by the Universal Debug Engine (UDE).

 

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pls Programmierbare Logik & Systeme GmbH

PLS Programierbare Logik & Systeme GmbH, based in Lauta, Germany, was founded in 1990. With its innovative modular test and development tools, the company has demonstrated for over two decades its position as an international technology leader in the field of debuggers, emulators and trace solutions for 16-bit and 32-bit microcontrollers. The software architecture of the Universal Debug Engine (UDE) guarantees optimal conditions for debugging SoC-based systems. For example, by means of the intelligent use of modern on-chip debugging and on-chip trace units, valuable functions such as profiling and code coverage are available for the system optimization. Furthermore, the associated Universal Access Device (UAD2/UAD3+) product family, with transfer rates of up to 3.5 Mbytes/s and a wide range of interfaces, offers entirely new dimensions for fast and flexible access to multicore systems. Important architectures such as TriCore, Power Architecture, XC2000/XE166, ARM, Cortex, SH-2A, XScale and C166/ST10 as well as simulation platforms of different vendors are supported. For further information about the company, please visit www.pls-mc.com.