Pressemitteilung BoxID: 185431 (pls Programmierbare Logik & Systeme GmbH)
  • pls Programmierbare Logik & Systeme GmbH
  • Straße der Freundschaft 92
  • 02991 Lauta
  • Ansprechpartner
  • Heiko Riessland
  • +49 (35722) 384-0

Extensive support for MPC560/MPC563xx and SPC560xx/SPC563xx microcontroller families

UDE 2.4 supports new Power Architecture 32-bit automotive MCUs from Freescale and STMicroelectronics

(PresseBox) (Lauta, ) At the same time as the launch of the automotive microcontroller families SPC560xx/SPC563xx from STMicroelectronics and MPC560/MPC563xx from Freescale, pls Programmierbare Logik & Systeme announces the availability of its Universal Debug Engine (UDE) 2.4, a complete debug and test environment especially for the specific features of these new Power Architecture 32-bit devices.

The high-end MCUs from the Joint Development Program (JDP) of Freescale and STMicroelectronics, are based on the e200 core with variable length encoding (VLE) instruction set and are currently designed for operating frequencies from 40 MHz to 80 MHz. By mean of an internal multi-master crossbar switch, an exceptionally high performance - for these clock speeds - is achieved.

In addition, the Power Architecture 32-bit devices - currently provided with up to 1.5 Mbytes of Flash and 64 Kbytes of RAM - feature an integrated memory management unit (MMU), DSP and floating-point functionality and a variety of peripheral interfaces and functions such as FlexRay, FlexCAN, LINFlex, eTPU, ADC, SPI and timer.

With the UDE 2.4, target system access to the Power Architecture 32-bit devices from STMicroelectronics and Freescale takes place by means of pls' Universal Access Device 2 (UAD2) via JTAG (NEXUS class 3). The unique JTAG extender of the UAD2+ allows a distance of several meters between target and host PCs with high interference immunity and transfer rates of up to 1 Mbyte/s.

The UDE 2.4 offers unrestricted support of the features of the SPC560xx/SPC563xx and MPC560/MPC563xx on-chip debug units. Code breakpoints and data breakpoints can be set easily with a mouse click and a dialog based configuration of complex trigger conditions is possible. Real-time data visualization and simulated I/O are implemented via the JTAG/Nexus port.

The Universal Debug Engine provides transparent use of variable length encoding (VLE). This alternative instruction set consists of 16-bit and 32-bit wide instructions and enables a higher code density. Fast and safe programming of the on-chip Flash, both direct within the debugger and by means of standalone tools e.g. for production environments, is supported by the UDE 2.4.

Even the debugging of programs for the enhanced Time Processor Unit (eTPU) - this relates to a programmable I/O controller with its own instruction set - is unrestricted possible within the UDE user interface.

An additional advantage: The UDE 2.4 is optimized for the specific features of the new Power Architecture 32-bit devices and can be used in combination with Freescale's CodeWarrior Compiler, Wind River's Power PC Compiler, Power PC GNU Compiler and Byte Craft's TPU Compiler.

In the third quarter of 2008, the UDE with the UAD2+ will also support NEXUS trace functions.

pls Programmierbare Logik & Systeme GmbH

pls Programierbare Logik & Systeme GmbH, based in Lauta, Germany, was founded in 1990 by Thomas Bauch and Dr. Stefan Weisse. With its innovative modular test and development tools, the company has demonstrated for almost two decades its position as an international technology leader in the field of debuggers, emulators and trace solutions for 16-bit and 32-bit microcontrollers. The software architecture of the Universal Debug Engine (UDE) guarantees optimal conditions for debugging SoC-based systems. For example, by means of the intelligent use of modern on-chip debugging and on-chip trace units, valuable functions such as profiling and code coverage are available for the system optimization. Furthermore, the associated Universal Access Device (UAD2 and UAD3+) product family, with transfer rates of up to 3.5 MBytes/s and a wide range of interfaces, offers entirely new dimensions for fast and flexible access to multi-core systems. Important architectures such as TriCore, PowerArchitecture, SH 2A, XC2000/XE166, ARM, Cortex, XScale and C166/ST10 as well as simulation platforms of different vendors are supported. For further information about the company, please visit www.pls